"Bringing 3D ICs to high-volume manufacturing is a requirement for the industry to move forward into the next technology node," said Erwan Le Roy, Marketing Vice President at SSEC. "SSEC's WaferEtch TSV Revealer helps to achieve this through integrating a low-cost wet etch process with metrology for performing thickness measurement. Our system replaces four tools with one (CMP, silicon thickness measurement, plasma etch, and clean), so we are able to achieve this at the lowest cost to the manufacturer."
The 3D InCites Awards were established in 2013 to recognize achievements to further the commercialization of 2.5D and 3D IC technologies. The 2014 3D InCites Awards were presented at a breakfast ceremony hosted by Impress Labs on Thursday, July 10, 2014, at the Impress Lounge during SEMICON West. The event featured guest speaker Bryan Black, Senior Fellow, AMD, who has led AMD¹s die stacking program for the past seven years. Black talked about the future of die stacking and where the benefits lie within the context of mainstream computing CPUs, APUs, and GPUs.
This year's event was co-promoted by 3D InCites, the premier online content source for reliable 3D technology information; SEMI, the global industry association serving the nano- and microelectronics manufacturing supply chains; and TechSearch International, the leading market research firm for advanced semiconductor packaging technology.