|Diagram showing side view through a board using embedded ICs. After the resin-coated copper is laminated, microvias are drilled down to the contact pads and then plated with copper. |
The idea of putting components inside the printed wiring board instead of on the surface of the board has been around for at least 30 years, although it has been limited to passive components such as the thin film resistive material made by Ohmega Technologies, and more recently the resistor/capacitor laminate core made by Ohmega and Oak/Mitsui. The endless drive toward smaller systems, however, means that attention is being given to placing active components inside the board as well.
If active components such as ICs are put inside the board, the sequence of assembly processes changes rather dramatically. Some method of getting the chip into the board is needed, but printing bond pads on the board becomes unnecessary. If all of the components are internal, reflow also becomes unnecessary.
A project that makes it feasible to place ICs inside the printed wiring board is nearing completion at the Fraunhofer Institute in Berlin, Germany. The Fraunhofer Institute is well known for taking advanced ideas and turning them into feasible, useful technologies. In the case of embedded chips, a guiding principle was that the assembly processes developed must use existing equipment, and not new, specially designed, expensive equipment.
The Fraunhofer project, code-named HIDINGDIES has been carried out in conjunction with several partners, including Nokia (Finland), Philips (Netherlands), AT&S (Austria), Datacon (Austria), CWM (Germany), and IMEC (Belgium). The purpose of the project is not to make surface-mount technology obsolete. No one involved in HIDINGDIES imagines that large boards with dozens of ICs will use this method; it is best suited for small assemblies with 1 or 2, or perhaps half a dozen ICs.
Probably the two most striking features of a completed board that uses embedded active devices are the assembly's invulnerability and its resistance to modification. Although it is too early for there to be a significant body of experience, it seems certain that chips that are embedded in the board will be very well protected from shock and vibration. Andreas Ostmann, physicist at the Fraunhofer Institute, notes that Nokia was interested in this aspect of embedded chips because people tend to drop cell phones.
At the same time, the fact that the chip is buried within the board makes rework essentially impossible. This in turn dictates that the assembly processes must achieve high reliability, because a defective chip or chip connection means that the whole board must be scrapped.
Thinner ICs Needed
The first step in Fraunhofer's production of an embedded-die board is the preparation of the ICs. Before the wafer is diced, it is thinned to 50 microns, and in some cases even less. The aluminum contact pads on the wafer are modified to make them suitable for PC board metallization. The bond pads first receive a sputtered layer of Ti/W/Cu that is 0.2 micron thick. On top of this goes a 5-micron thick layer of copper, put down by electroplating. Ostmann notes that a new and completely electroless method for modifying the bond pads is being developed, and that a first evaluation with an electroless Ni/Pd metallization has shown promising results. The wafer is then diced, and the chips are tested to screen out defects. The board that is used is not a conventional board but simply the core of a board. It is possible to embed chips by using a conventional board and cutting pits into which the embedded chips will be placed, but cutting pits tends to be difficult and expensive. The core material that Ostmann and his team use is an FR4 material modified to have a glass transition temperature of 170°C rather than the normal 140°C. The reason for the higher glass transition temperature is directly related to saving space: in some applications, surface-mount components may be added after the ICs (and perhaps passive components) are embedded, and in that case the board needs to pass through reflow without damage.
|Close-up view of traces and microvias above an embedded chip. |
The next step is to bond the thinned chip to the board core. Ostmann and his team have used cores ranging in thickness from 100 microns to 1500 microns. The team uses conventional die-bond equipment to place the die, and uses either a printed adhesive or a die attach film. Bonding of the thinned die to the board core is one of the most critical steps, Ostmann explains, because the die needs to be perfectly flat, with no irregularities in the bond. "This is a rule from PC board manufacturing," Ostmann points out. "You should always try to have a symmetrical build-up; if you don't do that, then you have a warped board."
After the die is bonded to the board core, a sheet of resin-coated copper having a high glass transition temperature is vacuum-laminated on top. Typically, the resin is 70 microns thick, while the copper is only 5 microns thick. The resin is both thick enough and fluid enough to flow over the die, which is at most 50 microns thick. The result is that the surface — the 5-micron copper layer — is perfectly flat.
Next, a laser is used to drill microvias through the copper and the resin down to the modified bond pads on the chip. The microvias are then plated with PC board-compatible copper, and the copper on top of the board is structured by conventional etching.
Ostmann's team has looked very closely at the characteristics and behavior of this essentially new type of assembly. One thing they have discovered: the woven FR4 material used in boards reacts to thermal changes in a peculiar way. Because it is woven, FR4 is restricted from expanding greatly in the x and y axes when it is heated. As a result, much of the expansion becomes vertical. This could be damaging to a basically brittle and thinned silicon chip bonded to the board.
So Ostmann and his team tested completed boards to see how much a chip might bend during thermal excursions. They also looked closely at their assembly processes to find ways to avoid unnecessary stresses. "We have discovered some processing tricks, and we have found that after lamination of the resin-coated copper on the top of the chip, there is a bending of 10 microns, which is acceptable," he says.
One of the obvious advantages of embedded chips is the very short interconnect distances. Shorter interconnections mean less delay, important for advanced designs. If the embedded chip assembly process that Ostmann and his team have worked out is used for advanced chips, either in civilian or military applications, the vertical expansion of FR4 might no longer be a concern. FR4 imposes relatively high dielectric losses, so truly advanced chips may be forced to move on to other materials, which presumably would not have similar vertical expansion issues.
Anyone accustomed to surface mount technology will find a board with embedded chips very strange to look at: the surface of the board is, well, naked. But for applications where ruggedness, short interconnects, and compact dimensions are important, the embedded chip concept may be just what is needed.
For more information: http://www.hidingdies.net