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Publication Date: 12/1/2011
Archive >  December 2011 Issue >  Electronic Mfg. Products > 

Goepel Demos IJTAG Support
Jena, Germany — Goepel electronic is introducing a prototype version of the company's JTAG/Boundary Scan software platform SYSTEM CASCON with integrated tools supporting the current version of the upcoming IEEE P1687 (IJTAG) standard.

IEEE P1687 focuses on the standardization of the access to and the documentation of the control of chip-embedded instruments, without limiting the number or type of instruments. Compatible test systems allow users to control various such instruments in a standardized and universal manner. Key elements of IEEE P1687 include a description language for the instrument interface structure, called ICL (Instrument Connectivity Language), and a description language for instrument control, called PDL (Procedural Description Language).

This special draft version of SYSTEM CASCON includes integrated prototypes of an ICL parser/compiler as well as a PDL executor. FPGA soft-macros are used as a demonstration vehicle for chip-embedded instruments, with their instrument access interface described in ICL. The demonstration includes the parsing of ICL information and the subsequent control of the instrument through PDL sequences.

This special version of SYSTEM CASCON is a conceptual study and is currently available only for non-commercial research and development applications. A final version is planned for release close to the official publication of IEEE Std 1687.

SYSTEM CASCON currently includes 45 completely integrated tools for in-system programming (ISP), test, debugging, and design validation.

Contact: Goepel electronics LLC, 9737 Great Hills Trail, Suite 170, Austin, TX 78759 888-446-3735 or 512-782-2500 fax: 734-471-1444 E-mail: Web: or

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